The invention relates to a clock generator including a PLL circuit for generating an output frequency cycled in a predefined range containing a desired basic clock frequency, the PLL circuit containing a voltage-controlled oscillator, the oscillating frequency of which is adjustable by means of an analog control voltage to the desired clock frequency in a fixed relationship to a reference frequency applied to the PLL, and including a second voltage-controlled oscillator the oscillating frequency of which can be cycled in the predefined range.
A clock generator of this kind is known from EP 0 739 089 A2. In this known clock generator the two voltage-controlled oscillators receive a control signal which sets them to a clock frequency defined in relationship to the reference frequency applied to the PLL. However, the second voltage-controlled oscillator receives an additional control voltage which is added to the first-mentioned control voltage. The two control voltages are analog voltage values which prior to being applied to the second voltage-controlled oscillator are added in an analog adding circuit. The additional control voltage is varied in accordance with a predefined memorized profile whereby the memorized digital values representing the desired variation profile are converted into analog values and applied to the adder. By sequentially applying the memorized digital values to the digital/analog converter and to the adder the output frequency of the second voltage-controlled oscillator can be varied over a desired range which then contains the clock frequency set with the aid of the control voltage applied to the two voltage-controlled oscillators.
With the aid of such a clock generator the object is to spread the spectrum of the output frequencies generated by the clock generator so that electromagnetic interference is reduced as generated by high-frequency clock generators whose output signal is set in frequency. By varying the clock frequency over a predefined range the energy radiated by the clock generator is distributed over a larger spectral range and thus reduced at the individual frequency lines.
In the known clock generator, varying the output frequency of the second voltage-controlled oscillator is achieved by superimposing its analog control voltage with a variable, likewise analog control voltage by addition. For this purpose the clock requires a digital/analog converter and an analog adding circuit. At high clock frequencies, however, the circuitry needed for an analog adding circuit becomes very complicated when taking into account that the voltages employed are in the microvolt range. Furthermore, it is difficult with the known clock generator to set the two voltage-controlled oscillators to the same clock frequency since the second oscillator to which the control voltage generated by the PLL is not applied directly but as a component of the output voltage of the adder results in any errors occurring in the adder also resulting in a wrong setting of the clock frequency. In the known clock generator the desired range for changing the clock frequency strived by varying the control voltage applied to the second oscillator via the adder applies only for a specific clock frequency. Any change in the clock frequency in no change in the range in which the absolute frequency values is varied, meaning that the percentual deviation as regards the clock frequency differs from frequency to frequency. This is a nuisance, however, since this results in the wanted optimum spreading of the spectrum for reducing the unwanted radiation being set only for a highly specific clock frequency.
The invention is based on the object of configuring a clock generator of the aforementioned kind so that with a simplified configuration an optimum reduction in the unwanted radiation is attained irrespective of the clock frequency set in each case.
In an embodiment of the invention the second oscillator is configured so that its oscillating frequency can be varied by means of a digital incrementally variable control signal in the predefined range.
In the clock generator in accordance with the invention the oscillating frequency of the second voltage-controlled oscillator can be varied with the aid of the digital control signals directly applied thereto, it thus now no longer being necessary to convert this digital control signal via a digital/analog converter into a analog signal and then to add it to the analog control signal generated by the PLL for then controlling the second oscillator by this sum signal.
In other embodiments, the second oscillator consists of 2n+1 negator stages cascaded as a kind of ring oscillator which delay the signal passing through them by a constant value in each case and that the signal can be delayed by variable values in one of the negator stages in addition to the constant delay value by means of the digital control signal.
In another embodiment it is provided for that each negator stage contains an n-channel MOSFET and a p-channel MOSFET in series therewith, the gates of which are interconnected, that to each series circuit of the two MOSFETs a further p-channel MOSFET is connected in series, to the gate of which the analog control voltage is applied to control the current flowing through the series circuit, and that in the one negator stage parallel to the further p-channel MOSFET additional p-channel MOSFETs are connected in parallel, to the gates of which digital signals for varying the current flowing through the series circuit in this negator stage can be applied.